Q.1
The processor indicates to the devices that it is ready to receive interrupts ________
  • a) By enabling the interrupt request line
  • b) By enabling the IRQ bits
  • c) By activating the interrupt acknowledge line
  • d) None of the mentioned
Q.2
When dealing with multiple devices interrupts, which mechanism is easy to implement?
  • a) Polling method
  • b) Vectored interrupts
  • c) Interrupt nesting
  • d) None of the mentioned
Q.3
The interrupt servicing mechanism in which the requesting device identifies itself to the processor to be serviced is ___________
  • a) Polling
  • b) Vectored interrupts
  • c) Interrupt nesting
  • d) Simultaneous requesting
Q.4
In vectored interrupts, how does the device identify itself to the processor?
  • a) By sending its device id
  • b) By sending the machine code for the interrupt service routine
  • c) By sending the starting address of the service routine
  • d) None of the mentioned
Q.5
The code sent by the device in vectored interrupt is _____ long.
  • a) upto 16 bits
  • b) upto 32 bits
  • c) upto 24 bits
  • d) 4-8 bits
Q.6
The starting address sent by the device in vectored interrupt is called as __________
  • a) Location id
  • b) Interrupt vector
  • c) Service location
  • d) Service id
Q.7
We describe a protocol of input device communication below:
  • a) Programmed mode of data transfer
  • b) DMA
  • c) Interrupt mode
  • d) Polling
Q.8
Which one of the following is true with regard to a CPU having a single interrupt request line and single interrupt grant line?
  • a) iii
  • b) i, iv
  • c) ii, iii
  • d) iii, iv
Q.9
Which table handle stores the addresses of the interrupt handling sub-routines?
  • a) Interrupt-vector table
  • b) Vector table
  • c) Symbol link table
  • d) None of the mentioned
Q.10
_________ method is used to establish priority by serially connecting all devices that request an interrupt.
  • a) Vectored-interrupting
  • b) Daisy chain
  • c) Priority
  • d) Polling
Q.11
In daisy chaining device 0 will pass the signal only if it has _______
  • a) Interrupt request
  • b) No interrupt request
  • c) Both No interrupt and Interrupt request
  • d) None of the mentioned
Q.12
______ interrupt method uses register whose bits are set separately by interrupt signal for each device.
  • a) Parallel priority interrupt
  • b) Serial priority interrupt
  • c) Daisy chaining
  • d) None of the mentioned
Q.13
______________ register is used for the purpose of controlling the status of each interrupt request in parallel priority interrupt.
  • a) Mass
  • b) Mark
  • c) Make
  • d) Mask
Q.14
The added output of the bits of the interrupt register and the mask register is set as an input of ______________
  • a) Priority decoder
  • b) Priority encoder
  • c) Process id encoder
  • d) Multiplexer
Q.15
Interrupts initiated by an instruction is called as _______
  • a) Internal
  • b) External
  • c) Hardware
  • d) Software
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