Q.1
Which gates in Digital Circuits are required to convert a NOR-based SR latch to an SR flip-flop?
  • a) Two 2 input AND gates
  • b) Two 3 input AND gates
  • c) Two 2 input OR gates
  • d) Two 3 input OR gates
Q.2
What characteristic will a TTL digital circuit possess due to its multi-emitter transistor?
  • a) Low capacitance
  • b) High capacitance
  • c) Low inductance
  • d) High inductance
Q.3
What input should be given to “S” when SR flip – flop is converted to JK flip – flop?
  • a) K.Q
  • b) K.Q
  • c) J.Q
  • d) J.Q
Q.4
What value is to be considered for a “don’t care condition”?
  • a) 0
  • b) 1
  • c) Either 0 or 1
  • d) Any number except 0 and 1
Q.5
What is the group ofin 4 cells of a K – map called?
  • a) Pair
  • b) Quad
  • c) Octet
  • d) Octave
Q.6
What will be the frequency of the output from a JK flip – flop, when J =K =and a clock with pulse waveform is given?
  • a) Half the frequency of clock input
  • b) Equal to the frequency of clock input
  • c) Twice the frequency of clock input
  • d) Independent of the frequency of clock input
Q.7
What gate is placed between clock input and the input of AND gate to convert a positive level triggered flip – flop to a negative level triggered flip – flop?
  • a) NOR gate
  • b) NOT gate
  • c) Buffer
  • d) NAND gate
Q.8
What will a TTL digital circuit possess due to the presence of a multi – emitter transistor?
  • a) Smaller resistance
  • b) Larger area
  • c) Smaller area
  • d) Larger resistance
Q.9
How must the output of a gate act when it is LOW in a TTL circuit?
  • a) Acts as a voltage source
  • b) Acts as a current sink
  • c) Acts as a current source
  • d) Acts as a voltage sink
Q.10
Which of the following gives the correct number of multiplexers required to build ax 1 multiplexer?
  • a) Two 16 x 1 mux
  • b) Three 8 x 1 mux
  • c) Two 8 x 1 mux
  • d) Three 16 x 1 mux
Q.11
What must be the input given to “R” when SR flip – flop is converted to JK flip – flop?
  • a) K.Q
  • b) K.Q
  • c) J.Q
  • d) J.Q
Q.12
What minimum distance is required for a single error correction according to Hamming’s analysis in Digital Electronics?
  • a) 1
  • b) 2
  • c) 3
  • d) 4
Q.13
How many errors can the Digital Electronics parity method can find in a single word?
  • a) Single error
  • b) Double error
  • c) Triple error
  • d) Multiple errors
Q.14
What is the group ofpresent in 8 cells of a K – map called?
  • a) Pair
  • b) Quad
  • c) Octet
  • d) Octave
Q.15
Which of these flip – flops cannot be used to construct a serial shift register?
  • a) D – flip flop
  • b) SR flip – flop
  • c) T flip – flop
  • d) JK flip – flop
Q.16
Which of these options represent the other name of Inter – Integrated logic?
  • a) Merged Transistor Logic
  • b) Emitter – Coupled Logic
  • c) High threshold logic
  • d) Resistor – Transistor logic
Q.17
Which of the following options is a Current – Mode logic used in Digital Circuits?
  • a) TTL
  • b) RTL
  • c) ECL
  • d) IIC
Q.18
How many AND gates are required to construct a 4 – bit parallel multiplier if four 4 – bit parallel binary adders are given?
  • a) Four 2 – input AND gates
  • b) Eight 2 – input AND gates
  • c) Sixteen 2 – input AND gates
  • d) Two 2 – input AND gates
Q.19
How many cycles of addition and shifting in a 4 – bit multiplier are required to perform multiplication using the shift method?
  • a) 1
  • b) 2
  • c) 4
  • d) 8
Q.20
How many 4 – bit parallel binary adders will be required to construct a 4 – bit parallel multiplier?
  • a) 1
  • b) 2
  • c) 4
  • d) 8
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