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Parallel Computing
Quiz 1
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Q.1
Clock speed is measured in
Hertz
Words
Bits Per Second
Metres Per Second
Q.2
Which of the following parallel algorithm models is applicable to web server?
Task graph
Work pool
Master-slave
Pipeline
Q.3
Intelmicroprocessor has an instruction set ofinstruction. The opcode to implement this instruction set should be at least
3 bit long
5 bit long
7 bit long
9 bit long
Q.4
The CISC stands for
computer instruction set compliment
complete instruction set compliment
computer indexed set components
complex instruction set computer
Q.5
The iconic feature of the RISC machine among the following are
reduced number of addressing modes
increased memory size
having a branch delay slot
all of the above
Q.6
In a single byte how many bits will be there?
8
16
4
32
Q.7
From where interrupts are generated?
central processing unit
memory chips
registers
i/o devices
Q.8
Which one of the following is most suitable to make a parity checker
and gate
or gate
exclusive- or gate
none of the above
Q.9
Interrupts which are initiated by an instruction are
internal
external
hardware
software
Q.10
In CISC architecture most of the complex instructions are stored in _____.
register
diodes
cmos
transistors
Q.11
Which architecture supports more than one processor working on more than one data stream?
SISD
SIMD
MISD
MIMD
Q.12
Why can dual core processors be considered better than single core?
Faster speed
More instructions carried out per second
Two instructions can be run in parallel
double the processing power
Q.13
Which of the following affects the performance of a CPU?
Number of cores
Hard Drive capacity
Number of applications stored
Number of Hard Drives used
Q.14
Which of the following parallel methodological design elements focuses on recognizing opportunities for parallel execution?
Partitioning
Communication
Aggromeration
Mapping
Q.15
Which architecture uses the least power?
SISD
SIMD
MISD
MIMD
Q.16
Data dependence is
Involves only those tasks executing a communication operation
It exists between program statements when the order of statement execution affects the results of the program.
It refers to the practice of distributing work among tasks so that all tasks are kept busy all of the tim It can be considered as minimization of task idle tim
None of these
Q.17
Synchronous communication operations referred to
Involves only those tasks executing a communication operation
It exists between program statements when the order of statement execution affects the results of the program.
It refers to the practice of distributing work among tasks so that all tasks are kept busy all of the tim It can be considered as minimization of task idle tim
None of these
Q.18
Load balancing is
Involves only those tasks executing a communication operation
It exists between program statements when the order of statement execution affects the results of the program.
It refers to the practice of distributing work among tasks so that all tasks are kept busy all of the tim It can be considered as minimization of task idle tim
None of these
Q.19
These computer uses the stored-program concept. Memory is used to store both program and data instructions and central processing unit (CPU) gets instructions and/ or data from memory. CPU, decodes theinstructions and then sequentially performs them.
Single Program Multiple Data (SPMD)
Flynn’s taxonomy
Von Neumann Architecture
None of these
Q.20
Here a single program is executed by all tasks simultaneously. At any moment in time, tasks can be executing the same or different instructions within the same program. These programs usually have the necessary logic programmed into them to allow different tasks to branch or conditionally execute only those parts of the program they are designed to execute.
Single Program Multiple Data (SPMD)
Multiple Program Multiple Data (MPMD)
Von Neumann Architecture
None of these
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