Q.1

The VHDL editor provided with a schematic editor development system will produce a file with the extension .vhd, which can be used by the simulator to test the output of the logic design.

  • True
  • False
Q.2

A Karnaugh map is similar to a truth table because it presents all the possible values of input variables and the resulting output of each value.

  • True
  • False
Q.3

Which of the following is an important feature of the sum-of-products (SOP) form of expression?

  • All logic circuits are reduced to nothing more than simple AND and OR gates.
  • The delay times are greatly reduced over other forms.
  • No signal must pass through more than two gates, not including inverters.
  • The maximum number of gates that any signal must pass through is reduced by a factor of two.
Q.4

Applying the distributive law to the expression , we get ________.

Q.5

A Karnaugh map is similar to a truth table.

  • True
  • False
Q.6

In the commutative law, in ORing and ANDing of two variables, the order in which the variables are ORed or ANDed makes no difference.

  • True
  • False
Q.7

The process of reduction or simplification of combinational logic circuits increases the cost of the circuit.

  • True
  • False
Q.8

Boolean algebra simplifies logic circuits.

  • True
  • False
Q.9

Most Boolean reductions result in an equation in only one form.

  • True
  • False
Q.10

By applying De Morgan's theorem to a NOR gate, two identical truth tables can be produced.

  • True
  • False
Q.11

Five-variable Karnaugh maps are impossible.

  • True
  • False
Q.12

Applying the distributive law to the expression , we get ________.

Q.13

Which Boolean algebra property allows us to group operands in an expression in any order without affecting the results of the operation [for example, A + B = B + A]?

  • associative
  • commutative
  • Boolean
  • distributive
Q.14

Which of the following is an important feature of the sum-of-products (SOP) form of expression?

  • All logic circuits are reduced to nothing more than simple AND and OR gates.
  • The delay times are greatly reduced over other forms.
  • No signal must pass through more than two gates, not including inverters.
  • The maximum number of gates that any signal must pass through is reduced by a factor of two.
Q.15

Five-variable Karnaugh maps are impossible.

  • True
  • False
Q.16

Most Boolean reductions result in an equation in only one form.

  • True
  • False
0 h : 0 m : 1 s