Q.1

The decimal equivalent of the largest number that can be stored in a 4-bit binary counter is ________.

  • 8
  • 15
  • 16
  • 32
Q.2

Many parallel counters use ________ presetting whereby the counter is preset on the active transition of the same clock signal that is used for counting.

  • feedback
  • synchronous
  • ripple
  • asynchronous
Q.3

Assume you want to determine the timing diagram for a 4-bit counter using an oscilloscope. The best choice for an oscilloscope trigger signal is ________.

  • the most significant bit (MSB)
  • the least significant bit (LSB)
  • the clock signal
  • from a composite of the MSB and LSB
Q.4

One characteristic of a ring counter is that the modulus is equal to the number of flip-flops in the register and, consequently, there are never any unused or invalid states.

  • True
  • False
Q.5

Three cascaded modulus-10 counters have an overall modulus of 1000.

  • True
  • False
Q.6

A state diagram is a table of states.

  • True
  • False
Q.7

A sequential circuit design is used to ________.

  • count up
  • count down
  • decode an end count
  • count in a random order
Q.8

The minimum number of flip-flops that can be used to construct a modulus-5 counter is ________.

  • 3
  • 5
  • 8
  • 10
Q.9

A D flip-flop can be made to toggle by ________.

  • connecting to Q to D
  • connecting to Q to D
  • connecting D low
  • connecting D high
Q.10

In a full-featured counter in HDL, the concept of rolling over simply means the count sequence has reached its limit and must start over at the beginning of the sequence.

  • True
  • False
Q.11

The 7447 has a 4-bit BCD input, seven individual active-LOW outputs, and a ripple blanking input and output.

  • True
  • False
Q.12

A reliable method for eliminating decoder spikes is to use strobing.

  • True
  • False
Q.13

A ripple counter is an asynchronous counter.

  • True
  • False
Q.14

The MOD-10 counter is also referred to as a ________ counter.

  • decade
  • strobing
  • BCD
  • circuit
Q.15

The duty cycle of the most significant bit from a 4-bit (0–9) BCD counter is ________.

  • 10%
  • 20%
  • 50%
  • 80%
Q.16

Assume a 4-bit ripple counter has a failure in the second flip-flop such that it "locks up." The third and fourth stages will ________.

  • continue to count with correct outputs
  • continue to count but have incorrect outputs
  • stop counting
  • turn into molten silicon
Q.17

All decade counters are BCD counters.

  • True
  • False
Q.18

Shift register counters use logic functions to reset the registers when the desired count is reached.

  • True
  • False
Q.19

An asynchronous counter differs from a synchronous counter in the method of clocking.

  • True
  • False
Q.20

The MOD number of a Johnson counter will always be equal to one-half the number of flip-flops in the counter.

  • True
  • False
Q.21

In general, when using a scope to troubleshoot digital systems the instrument should be triggered by ________.

  • the A channel or channel 1
  • the vertical input mode, when using more than one channel
  • the system clock
  • line sync, in order to observe troublesome power line glitches
Q.22

Shift-register counters use ________, which means that the output of the last FF in the register is connected back to the first FF in some way.

  • MOD
  • feedback
  • strobing
  • switchbacks
Q.23

In order to use a shift register as a counter, ________.

  • the register's serial input is the counter input and the serial output is the counter output
  • the parallel inputs provide the input signal and the output signal is taken from the serial data output
  • serial in/serial out register must be used
  • the serial output of the register is connected back to the serial input of the register
Q.24

The terminal count of a typical modulus-10 binary counter is 1010.

  • True
  • False
Q.25

The given circuit is a(n) ________.

  • three-bit synchronous binary counter
  • eight-bit asynchronous binary flip-flop
  • two-bit asynchronous binary counter
  • four-bit asynchronous binary counter
Q.26

A J-K flip-flop excitation table lists the present state, the next state, and the J and K levels required to produce each transition.

  • True
  • False
Q.27

In general, when using a scope to troubleshoot digital systems the instrument should be triggered by ________.

  • the A channel or channel 1
  • the vertical input mode, when using more than one channel
  • the system clock
  • line sync, in order to observe troublesome power line glitches
Q.28

The given circuit is a(n) ________.

  • three-bit synchronous binary counter
  • eight-bit asynchronous binary flip-flop
  • two-bit asynchronous binary counter
  • four-bit asynchronous binary counter
Q.29

In order to use a shift register as a counter, ________.

  • the register's serial input is the counter input and the serial output is the counter output
  • the parallel inputs provide the input signal and the output signal is taken from the serial data output
  • serial in/serial out register must be used
  • the serial output of the register is connected back to the serial input of the register
Q.30

The circuit shown below is a ________.

  • Johnson counter
  • ring counter
  • decade counter
  • BCD counter
0 h : 0 m : 1 s