Q.1

The circuit shown below is a ________.

  • Johnson counter
  • ring counter
  • decade counter
  • BCD counter
Q.2

Dependency notation is no longer used.

  • True
  • False
Q.3

The concept of a counter to implement a digital one-shot using HDL is not used.

  • True
  • False
Q.4

A parallel in/serial out shift register enters all data bits simultaneously and transfers them out one bit at a time.

  • True
  • False
Q.5

The modulus of a counter is the actual number of states in its sequence.

  • True
  • False
Q.6

To design a divide-by-200 counter using synchronous counters, two 4-bit counters could be cascaded together to form an 8-bit counter.

  • True
  • False
Q.7

To cascade is to connect in parallel.

  • True
  • False
Q.8

Generally speaking, the synchronous counter requires more circuitry than an asynchronous counter.

  • True
  • False
Q.9

All flip-flops in an asynchronous counter change states at the same time.

  • True
  • False
Q.10

When a J-K flip-flop is used in a circuit, we only have to consider the level at J and K at the active clock edge to know the states of the outputs.

  • True
  • False
Q.11

Cascade means to connect the Q output of one flip-flop to the clock input of the next.

  • True
  • False
Q.12

Another term used to describe up/down counters is bidirectional.

  • True
  • False
Q.13

When implementing a complete system application using IC counter chips, output devices such as LED indicators must be configured to operate from the counter outputs.

  • True
  • False
Q.14

A glitch is a short pulse resulting in an undesired result in a digital circuit.

  • True
  • False
Q.15

Asynchronous counters are known as modulus counters.

  • True
  • False
Q.16

In a synchronous counter, each state is clocked by the same pulse.

  • True
  • False
Q.17

Basic counters can be cascaded in parallel to increase the number of data bits that the counter can handle.

  • True
  • False
Q.18

In a 74192 BCD decade up-/down-counter, the terminal count up and the terminal count down are active-LOW.

  • True
  • False
Q.19

An effective time delay device can be constructed by using the propagation delay characteristic of parallel shift registers.

  • True
  • False
Q.20

In VHDL, when we want to remember a value it must be stored in a VARIABLE.

  • True
  • False
Q.21

Counters are generally decoded in order to determine their count state.

  • True
  • False
Q.22

The term synchronous refers to events that do not occur at the same time.

  • True
  • False
Q.23

Synchronous binary counters can only be used for the application of timing of digital systems.

  • True
  • False
Q.24

In a seven-segment LED display, the BCD must be decoded into a format that can be used to drive the decimal numeric display.

  • True
  • False
Q.25

Parallel in/parallel out registers have parallel input and output busses.

  • True
  • False
Q.26

Phototransistors have varying resistance from collector to emitter, depending on how much light strikes them.

  • True
  • False
Q.27

Most sequential circuits contain a combinational logic section and a memory section.

  • True
  • False
Q.28

The term synchronous, as applied to counter operations, means that the counter is clocked such that each flip-flop in the counter is triggered at the same time.

  • True
  • False
Q.29

Once an up/down counter begins its count sequence, it cannot be reversed.

  • True
  • False
Q.30

Shift registers are used to store and transfer data.

  • True
  • False
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