Q.1

A serial in/serial out shift register transfers data from one line of a parallel bus to another line one bit at a time.

  • True
  • False
Q.2

The serial in/parallel out shift register transfers data from one parallel data bus to another parallel data bus one bit at a time across a single line.

  • True
  • False
Q.3

________ counters are often used whenever pulses are to be counted and the results displayed in decimal.

  • Synchronous
  • Bean
  • Decade
  • BCD
Q.4

A reliable method for eliminating decoder spikes is the technique called ________.

  • strobing
  • feeding
  • wagging
  • waving
Q.5

In order to check the CLR function of a counter, ________.

  • apply the active level to the CLR input and check all of the Q outputs to see if they are all in their reset state
  • ground the CLR input and check to be sure that all of the Q outputs are LOW
  • connect the CLR input to Vcc and check to see if all of the Q outputs are HIGH
  • connect the CLR to its correct active level while clocking the counter; check to make sure that all of the Q outputs are toggling
Q.6

The technique used by one-shots to respond to an edge rather than a level is called ________.

  • level management
  • edge triggering
  • trigger input
  • edge trapping
Q.7

A J-K flip-flop is reset and must stay reset after the clock pulse. This transition requires that ________.

  • J and K inputs must both = 0
  • J must be 0, K doesn't matter
  • J doesn't matter, K must = 0
  • J must be 0 and K must be 1
Q.8

A decade counter will count through decimal ________.

  • 10
  • 9
  • 15
  • 0
Q.9

The ________ counter in the Altera library has controls that allow it to count up or down, and perform synchronous parallel load and asynchronous cascading.

  • 74134
  • LPM
  • synchronous
  • AHDL
Q.10

One method of troubleshooting involves ________ the circuit under test with a ________ or ________ and then observing the output to check for proper bit patterns.

  • checking, voltmeter, ohmmeter
  • exercising, stimulus, test pattern
  • testing, scope, logic analyzer
  • smashing, hammer, axe
Q.11

In VHDL, if we need to remember a value it must be stored in a ________.

  • function
  • type declaration
  • variable
  • process
Q.12

A 4-bit binary up counter has an input clock frequency of 20 kHz. The frequency of the most significant bit is ________.

  • 1.25 kHz
  • 2.50 kHz
  • 160 kHz
  • 320 kHz
Q.13

A glitch that appears on the decoded output of a ripple counter is often difficult to see on an oscilloscope because ________.

  • it is a random event
  • it occurs less frequently than the normal decoded output
  • it is very fast
  • all of the above
Q.14

A 4-bit binary up counter has an input clock frequency of 20 kHz. The frequency of the most significant bit is ________.

  • 1.25 kHz
  • 2.50 kHz
  • 160 kHz
  • 320 kHz
Q.15

The term synchronous, as applied to counter operations, means that the counter is clocked such that each flip-flop in the counter is triggered at the same time.

  • True
  • False
Q.16

A 4-bit binary up counter has an input clock frequency of 20 kHz. The frequency of the most significant bit is ________.

  • 1.25 kHz
  • 2.50 kHz
  • 160 kHz
  • 320 kHz
Q.17

The ________ counter in the Altera library has controls that allow it to count up or down, and perform synchronous parallel load and asynchronous cascading.

  • 74134
  • LPM
  • synchronous
  • AHDL
Q.18

A 4-bit binary up counter has an input clock frequency of 20 kHz. The frequency of the most significant bit is ________.

  • 1.25 kHz
  • 2.50 kHz
  • 160 kHz
  • 320 kHz
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