Q.1

The effect of an inverted output being connected to the inverting input of another gate is to effectively eliminate one of the inversions, resulting in a single inversion.

  • True
  • False
Q.2

In VHDL, local signals are declared in the VARIABLE section, which is placed between the SUBDESIGN section and the logic section.

  • True
  • False
Q.3

The OR gate performs like two switches wired in a series.

  • True
  • False
Q.4

A minimum of three universal NOR gates would be required to perform the logical operation of a 2-input AND gate.

  • True
  • False
Q.5

The inputs to an AND gate are: A = 1, B = 0, C =The output will be LOW.

  • True
  • False
Q.6

A two-input NAND gate has inputs of 1 and 0; the output is 0.

  • True
  • False
Q.7

The Boolean expression for a three-input AND gate is X = ABC.

  • True
  • False
Q.8

Boolean algebra was first applied to the analysis of digital circuits by Claude Shannon at Stanford University.

  • True
  • False
Q.9

In Boolean algebra, 1 · 0 = 0.

  • True
  • False
Q.10

A NAND gate consists of an AND gate and an OR gate connected in series with each other.

  • True
  • False
Q.11

Which of the examples below expresses the associative law of addition:

  • A + (B + C) = (A + B) + C
  • A + (B + C) = A + (BC)
  • A(BC) = (AB) + C
  • ABC = A + B + C
Q.12

Output logic levels for certain input conditions of a logic circuit may often be determined without using the Boolean expression.

  • True
  • False
Q.13

The application of DeMorgan's theorems to a Boolean expression with double and single inversions produces a resultant expression that contains only single inverter signs over single variables.

  • True
  • False
Q.14

Boolean multiplication is symbolized by A + B.

  • True
  • False
Q.15

The logic gate that will have HIGH or "1" at its output when any one of its inputs is HIGH is a(n):

  • NOR gate
  • OR gate
  • AND gate
  • NOT operation
Q.16

The format used to present the logic output for the various combinations of logic inputs to a gate is called a(n):

  • truth table.
  • input logic function.
  • Boolean constant.
  • Boolean variable.
Q.17

In an expression containing both AND and OR operations, the AND operations are performed first (unless parentheses indicate otherwise).

  • True
  • False
Q.18

In a text-based language, the circuit being described must be given a name.

  • True
  • False
Q.19

How are the statements between BEGIN and END not evaluated in VHDL?

  • Constantly
  • Simultaneously
  • Concurrently
  • Sequentially
Q.20

In VHDL, the mode of a port does not define:

  • an input.
  • an output.
  • both an input and an output.
  • the TYPE of the bit.
0 h : 0 m : 1 s