Q.1

What is the difference between a full-adder and a half-adder?

  • Half-adder has a carry-in.
  • Full-adder has a carry-in.
  • Half-adder does not have a carry-out.
  • Full-adder does not have a carry-out.
Q.2

Subtract the following binary numbers.

0101 1000 &nbsp 1010 0011 &nbsp 1101 1110
–0010 0011 &nbsp –0011 1000 &nbsp –0101 0111
  • 0011  0100    0110  1010    1000  0110
  • 0011  0101    0110  1011    1000  0111
  • 0011  0101    0110  1010    1000  0111
  • 0011  0101    0110  1010    1000  0110
Q.3

The selector inputs to an arithmetic/logic unit (ALU) determine the:

  • selection of the IC
  • arithmetic or logic function
  • data word selection
  • clock frequency to be used
Q.4

Divide the following binary numbers.

  • 0000  0010    0000  0010    1000  1111
  • 0000  0010    0001  0010    0000  0100
  • 0000  0011    0000  0010    0000  0100
  • 0000  0010    0000  0010    0000  0100
Q.5

Half-adders can be combined to form a full-adder with no additional gates.

  • True
  • False
Q.6

It is not necessary to have the same number of bits when adding or subtracting signed binary numbers in the 2's-complement system.

  • True
  • False
Q.7

Digital computers use an easier method to subtract binary numbers, called one's complement.

  • True
  • False
Q.8

An ALU is a multipurpose device capable of providing several different logic operations.

  • True
  • False
Q.9

Solve this binary problem: 01011000 ÷ 00001011 = ________.

  • 1010
  • 0110
  • 1000
  • 1110
Q.10

In VHDL, the architecture declaration always begins with the ________ of variable signals or components that will be used in the concurrent description between BEGIN and END.

  • type
  • vectors
  • functions
  • declarations
Q.11

Convert each of the following signed binary numbers (two's-complement) to a signed decimal number.
00000101        11111100        11111000

  • –5    +4    +8
  • +5    –4    –8
  • –5    +252    +248
  • +5    –252    –248
Q.12

Solve this BCD problem: 0100 + 0110 =

  • 00010000BCD
  • 00010111BCD
  • 00001011BCD
  • 00010011BCD
Q.13

The carry propagation delay in 4-bit full-adder circuits:

  • is cumulative for each stage and limits the speed at which arithmetic operations are performed
  • is normally not a consideration because the delays are usually in the nanosecond range
  • decreases in direct ratio to the total number of full-adder stages
  • increases in direct ratio to the total number of full-adder stages, but is not a factor in limiting the speed of arithmetic operations
Q.14

Perform subtraction on each of the following binary numbers by taking the two's-complement of the number being subtracted and then adding it to the first number.
01001        01100
00011        00111

  • 01100    10011
  • 00110    00101
  • 10110    10101
  • 00111    00100
Q.15

A sign bit of "1" in the difference of a 2's-complement subtraction problem indicates the magnitude is negative and in true binary form.

  • True
  • False
Q.16

The solution to the BCD problem 0101 + 0100 is 00001001BCD.

  • True
  • False
Q.17

Add the following hex numbers: 011016 + 1001016

  • 1012016
  • 1002016
  • 1112016
  • 0012016
Q.18

How many inputs must a full-adder have?

  • 2
  • 3
  • 4
  • 5
Q.19

The summing outputs of a half- or full-adder are designated by which Greek symbol?

  • omega
  • theta
  • lambda
  • sigma
Q.20

Perform the following hex subtraction: ACE16 – 99916 =

  • 23516
  • 13516
  • 03516
  • 33516
Q.21

Full adder results are typically stored in registers.

  • True
  • False
Q.22

The representation of –110 in eight-bit two's-complement notation is 11110111.

  • True
  • False
Q.23

Binary multiplication is like decimal multiplication except you deal only with 1s and 0s.

  • True
  • False
Q.24

The solution to the binary problem 1011 – 0111 is 1000.

  • True
  • False
Q.25

BCD arithmetic is performed using base 10 numbers.

  • True
  • False
Q.26

When decimal numbers with several digits are to be added together using BCD adders ________.

  • a separated BCD adder is required for each digit position
  • the BCD adders must have the carry-outs grounded
  • the BCD's must be grouped in twos
  • full adders are also used
Q.27

How many basic binary subtraction operations are possible?

  • 4
  • 3
  • 2
  • 1
Q.28

The truth table for a full adder is shown below. What are the values of X, Y, and Z?

  • X = 0, Y = 1, Z = 1
  • X = 1, Y = 1, Z = 1
  • X = 1, Y = 0, Z = 1
  • X = 0, Y = 0, Z = 1
Q.29

What are constants in VHDL code?

  • Fixed numbers represented by a name
  • Fixed variables used in functions
  • Fixed number types
  • Constants do not exist in VHDL code.
Q.30

An input to the mode pin of an arithmetic/logic unit (ALU) determines if the function will be:

  • one's-complemented
  • arithmetic or logic
  • positive or negative
  • with or without carry
0 h : 0 m : 1 s