Q.1

One of the first steps in any HDL project is to define its scope by naming each input and output.

  • True
  • False
Q.2

In HDL, one of the strategies used in strategic planning is to find the speed requirements.

  • True
  • False
Q.3

In the digital clock project, a MOD-60 BCD counter is made from a MOD-10 counter cascaded to a MOD-6 BCD counter.

  • True
  • False
Q.4

In the digital clock project, when it is 11:59:59, AND gate 1 detects that the tens of hours is 1 and the edge trigger clock moves the display to 12:00:00.

  • True
  • False
Q.5

Top-down design means that we start at the highest level of the hierarchy, or that the entire project is considered to exist in a closed dark box with inputs and outputs.

  • True
  • False
Q.6

When coming up with a strategy for dividing the overall project into manageable-size pieces one must ________.

  • name each input and output
  • fully understand how the device should operate
  • define successful completion of the project
  • know the nature of all the signals that interconnect all the pieces
Q.7

In HDL, one of the strategies used in strategic planning is to find a way to test each piece of the project.

  • True
  • False
Q.8

In the keypad encoder, the ring counter is implemented using ________ that responds to the clk input.

  • SIGNAL
  • FUNCTION
  • CASE
  • PROCESS
Q.9

The timing and control block provides the ________ for the frequency counter.

  • brains
  • BCD counters
  • display register
  • six different frequency measurement ranges
Q.10

In the digital clock project HDL code, the MOD-12 counter is using ________.

  • a BCD counter followed by a MOD-2 counter
  • a single HDL module
  • a MOD-6 counter followed by a MOD-2 counter
  • a MOD-12 counter followed by a D flip-flop
Q.11

A very critical dimension in project management is ________.

  • cost
  • skill
  • time
  • personnel
Q.12

In the digital clock project, the 1 pps signal is used as a synchronous clock for all of the counter stages, which are ________.

  • advanced BCD counters
  • MOD-6 counters
  • synchronous cascaded
  • 1 pulse per second
Q.13

The wave-drive sequence of a stepper motor has more torque and operates more smoothly than the full-step sequence at moderate speeds.

  • True
  • False
Q.14

In the keypad HDL encoder, the ts bit array represents a tristate buffer.

  • True
  • False
Q.15

The full-step sequence always has two coils of the stepper motor energized in any state of the sequence and typically causes 30° of shaft rotation per step.

  • True
  • False
Q.16

In the keypad HDL encoder, after releasing a key the ring counter resumes its counting sequence.

  • True
  • False
Q.17

The frequency counter measures frequency by enabling a counter to count the number of pulses of the incoming waveform during a precisely specified period of time called the sampling time.

  • True
  • False
Q.18

VARIABLES are considered to be updated ________ within a sequence of statements in a PROCESS, whereas SIGNALS referred to in a PROCESS are updated when the PROCESS ________.

  • once, starts
  • immediately, suspends
  • twice, ends
  • never, starts
Q.19

The major blocks of the frequency counter are the counter, ________, decoder/display, and the timing and control unit.

  • signal prescaler
  • control inputs
  • signal generator
  • display register
Q.20

A very critical dimension in project management is the time your boss will give you to complete the HDL project.

  • True
  • False
0 h : 0 m : 1 s