Q.1

An unused input of a NAND gate can be left unconnected, pulled high by a pull-up resistor and tied together with another input and not change the logic output.

  • True
  • False
Q.2

The noise immunity of a logic circuit refers to the circuit's ability to tolerate noise by causing spurious charges in the output voltage.

  • True
  • False
Q.3

The principal advantage of MOS ICs over TTL ICs is their fast operating speed.

  • True
  • False
Q.4

A major drawback in using ECL logic circuits in conjunction with TTL and MOS circuits is its negative supply voltages and logic levels.

  • True
  • False
Q.5

The output current for a LOW output is called a(n) ________.

  • sink current
  • ground current
  • exit current
  • fan-out
Q.6

Several manufacturers have developed logic that combines the best features of TTL and CMOS. This is called ________.

  • 12L
  • BiCMOS
  • 74ACT
  • 74HCT
Q.7

The 74F-Fast TTL integrated-circuit fabrication technique uses reduced interdevice ________ to achieve reduced propagation delays.

  • noise
  • resistance
  • capacitance
  • inductance
Q.8

ECL gates are noted for their high frequency capability and small output voltage swing.

  • True
  • False
Q.9

CMOS stands for "complementary metal-oxide semiconductors" and the FETs are normally enhancement mode devices.

  • True
  • False
Q.10

A common means for measuring and comparing the overall performance of an IC family is the speed-power product.

  • True
  • False
Q.11

The CMOS series that is pin-compatible with the TTL family is the 4000 series.

  • True
  • False
Q.12

Due to the extremely low power requirements of CMOS logic circuits, any number of CMOS and TTL gates can be interconnected.

  • True
  • False
Q.13

________ TTL allows three possible output states.

  • Triswitch
  • Triinput
  • Tristate
  • Trident
Q.14

The proliferation of small handheld consumer equipment such as digital video cameras, cellular phones, handheld computers (________), portable audio systems, and other devices has created a need for logic circuits in very small packages.

  • HDLs
  • GDAs
  • PDAs
  • TTLs
Q.15

Totem-pole outputs ________ be connected ________ because ________.

  • can, in parallel, sometimes higher output current is required
  • cannot, together, if the outputs are in opposite states excessively high currents can damage one or both of the devices
  • should, in series, certain applications may require higher output voltage
  • can, together, together they can handle larger load currents and higher output voltages
Q.16

The power dissipation of a CMOS IC will ________.

  • decrease with frequency
  • increase with gate size
  • decrease with gate size
  • increase with frequency
Q.17

A ________ is a testing and troubleshooting tool that generates a short-duration pulse when manually activated, usually by depressing a push button.

  • cattle prod
  • jimmy rod
  • logic pulser
  • bilateral switch
Q.18

The ________ is defined as the maximum number of standard logic inputs that an output can drive reliably.

  • fan-drive
  • fan-out
  • fan-in
  • open-collector
Q.19

________ is ideally suited for applications using battery power or battery backup power.

  • MOS
  • P-MOS
  • N-MOS
  • CMOS
Q.20

In a DIP the spacing between pins is typically ________.

  • 5 mils
  • 10 mils
  • 50 mils
  • 100 mils
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