Q.1

Which of the following logic families has the shortest propagation delay?

  • S-TTL
  • AS-TTL
  • HS-TTL
  • HCMOS
Q.2

The upper transistor of a totem-pole output is OFF when the gate output is low.

  • True
  • False
Q.3

The bipolar TTL logic family that was developed to increase switching speed by preventing transistor saturation is:

  • emitter-coupled logic (ECL).
  • current-mode logic (CML).
  • transistor-transistor logic (TTL).
  • emitter-coupled logic (ECL) and transistor-transistor logic (TTL).
Q.4

The noise margin for TTL is 0.8 V.

  • True
  • False
Q.5

What type of logic circuit is shown below and what logic function is being performed? >

  • It is an NMOS AND gate.
  • It is a CMOS AND gate.
  • It is a CMOS NOR gate.
  • It is a PMOS NAND gate.
Q.6

What type of logic circuit is shown below and what logic function is being performed? >

  • It is an NMOS AND gate.
  • It is a CMOS AND gate.
  • It is a CMOS NOR gate.
  • It is a PMOS NAND gate.
Q.7

Which of the following logic families has the highest noise margin?

  • TTL
  • LS TTL
  • CMOS
  • HCMOS
Q.8

The propagation delay of standard TTL gates is approximately ________.

  • 2 s
  • 1 s
  • 4 ns
  • 10 ns
Q.9

Which of the following logic families has the highest noise margin?

  • TTL
  • LS TTL
  • CMOS
  • HCMOS
Q.10

What type of logic circuit is shown below and what logic function is being performed? >

  • It is an NMOS AND gate.
  • It is a CMOS AND gate.
  • It is a CMOS NOR gate.
  • It is a PMOS NAND gate.
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