Q.1

An open-drain gate is the CMOS counterpart of ________.

  • an open-collector TTL gate
  • a tristate TTL gate
  • a bipolar junction transistor
  • an emitter-coupled logic gate
Q.2

It is best not to leave unused TTL inputs unconnected (open) because of TTL's ________.

  • noise sensitivity
  • low-current requirement
  • open-collector outputs
  • tristate construction
Q.3

PMOS and NMOS circuits are used largely in ________.

  • MSI functions
  • LSI functions
  • diode functions
  • TTL functions
Q.4

The active switching element used in all TTL circuits is the ________.

  • bipolar junction transistor (BJT)
  • field-effect transistor (FET)
  • metal-oxide semiconductor field-effect transistor (MOSFET)
  • unijunction transistor (UJ)
Q.5

Which is not a MOSFET terminal?

  • Gate
  • Drain
  • Source
  • Base
Q.6

A TTL NAND gate with IIL(max) of –1.6 mA per input drives eight TTL inputs. How much current does the drive output sink?

  • –12.8 mA
  • –8 mA
  • –1.6 mA
  • –25.6 mA
Q.7

Which is not an output state for tristate logic?

  • HIGH
  • LOW
  • High-Z
  • Low-Z
Q.8

TTL is alive and well, particularly in ________.

  • industrial applications
  • educational applications
  • military applications
  • commercial applications
Q.9

If ICCH is specified as 1.1 mA when VCC is 5 V and if the gate is in a static (noncharging) HIGH output state, the power dissipation (PD) of the gate is ________.

  • 5.5 mW
  • 5.5 W
  • 5 mW
  • 1.1 mW
Q.10

An open-collector output requires ________.

  • a pull-down resistor
  • a pull-up resistor
  • no output resistor
  • an output resistor
Q.11

Most TTL logic used today is some form of ________.

  • Schottky TTL
  • tristate TTL
  • low-power TTL
  • open-collector TTL
Q.12

For a CMOS gate, which is the best speed-power product?

  • 1.4 pJ
  • 1.6 pJ
  • 2.4 pJ
  • 3.3 pJ
Q.13

The nominal value of the dc supply voltage for TTL and CMOS is ________.

  • +3 V
  • +5 V
  • +9 V
  • +12 V
Q.14

Which is not a precaution for handling CMOS?

  • Devices should be placed with pins down on a grounded surface, such as a metal plate.
  • All tools, test equipment, and metal workbenches should be earth grounded.
  • CMOS devices should not be inserted into sockets or PC boards with the power on.
  • Wear wool clothes at all times.
Q.15

One output structure of a TTL gate is often referred to as a ________.

  • totem-pole arrangement
  • diode arrangement
  • JBT arrangement
  • base, emitter, collector arrangement
Q.16

Which transistor element is used in CMOS logic?

  • FET
  • MOSFET
  • Bipolar
  • Unijunction
Q.17

Which logic family combines the advantages of CMOS and TTL?

  • BiCMOS
  • TTL/CMOS
  • ECL
  • TTL/MOS
Q.18

Which factor does not affect CMOS loading?

  • Charging time associated with the output resistance of the driving gate
  • Discharging time associated with the output resistance of the driving gate
  • Output capacitance of the load gates
  • Input capacitance of the load gates
Q.19

In a TTL circuit, if an excessive number of load gate inputs are connected, ________.

  • VOH(min) drops below VOH
  • VOH drops below VOH(min)
  • VOH exceeds VOH(min)
  • VOH and VOH(min) are unaffected
Q.20

A certain gate draws 1.8 A when its output is HIGH and 3.3 µA when its output is LOW. VCC is 5 V and the gate is operated on a 50% duty cycle. What is the average power dissipation (PD)?

  • 2.55 W
  • 1.27 W
  • 12.75 W
  • 5 W
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