Why do most dynamic RAMs use a multiplexed address bus?
The checkerboard pattern test is used to test ________.
What is the meaning of RAM, and what is its primary role?
In a register stack, data moves up but not down.
Due to their ability to be easily erased and reused, magnetic memory devices are widely used for RAM.
A typical RAM will write (store data internally) whenever the Chip Select line is active and the Write Enable line is inactive.
When two or more devices try to send their own digital levels to a shared data bus at the same time, bus contention will take place.
The checksum method is used to test ________.
Which type of ROM can be erased by an electrical signal?
Because of their nonvolatility, high speed, low power requirements, and lack of moving parts, ________ have become feasible alternatives to magnetic disk storage.
ROMs are used to store data on a permanent basis.
In DRAM operations, it is assumed that R/W is in its ________ state during a ________ operation.
Information that is stored in an EEPROM ________.
Which of the following RAM timing parameters determine its operating speed?
The storage element for a static RAM is the ________.
Most flash chips use a bulk erase operation in which all cells on the chip are erased simultaneously.
Because 4096 = 212, a 4K × 1 RAM requires ________ address bits to access all locations.
Suppose that a certain semiconductor memory chip has a capacity of 8K ×How many bytes could be stored in this device?
The memory operation that stores data into a memory location after entering a new address is called ________.
The time delay called access time, tac, is a measure of the ROM's operating speed.
The major advantage of dynamic RAM over static RAM is ________.
The address space of a RAM memory can be expanded using a decoder and additional memory ICs. The output of the decoder should be connected to which input line of the memory?
The difference between RAM and ROM is that ________.
The reason the data outputs of most ROM ICs are tristate outputs is to:
In a DRAM, what is the state of R/W during a read operation?
To reduce the number of pins on high-capacity DRAM chips, address ________ is used so that a single pin can accommodate two different address bits.
Data is written to and read from the disk via a magnetic ________ head mechanism in the floppy drive.
What does the term "random access" mean in terms of memory?
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