Q.1

Field-programmable gate arrays (FGPAs) use ________ memory technology, which is ________.

  • DRAM, nonvolatile
  • SRAM, nonvolatile
  • SRAM, volatile
  • RAM, volatile
Q.2

A GAL is essentially a ________.

  • non-reprogrammable PAL
  • PAL that is programmed only by the manufacturer
  • very large PAL
  • reprogrammable PAL
Q.3

The content of a simple programmable logic device (PLD) consists of:

  • fuse-link arrays
  • thousands of basic logic gates
  • advanced sequential logic functions
  • thousands of basic logic gates and advanced sequential logic functions
Q.4

A macrocell basically contains ________.

  • a programmable AND-OR gate array and some input buffers
  • an OR-gate array and some output logic
  • an AND-OR gate array and some output logic
  • licensed programming
Q.5

How many combinations are handled in an LUT?

  • 4
  • 8
  • 16
  • 32
Q.6

Product terms are the outputs of which type of gate within a PLD array?

  • OR
  • XOR
  • AND
  • flip-flop
Q.7

Which one of the following is an embedded function of the Stratix II FPGA?

  • AND-OR logic
  • Programmable SOP
  • Digital signal processing
  • None of the above
Q.8

SPLDs, CPLDs, and FPGAs are all which type of device?

  • PAL
  • PLD
  • EPROM
  • SRAM
Q.9

Cascade chains are closely associated with ________.

  • CLBs
  • SOP functions
  • logic expansion
  • all of the above
Q.10

In a FLEX10K, what two outputs will the LE produce?

  • The LAB and the fast track
  • ON and OFF
  • Hi-Z and ON
  • Hi-Z and OFF
Q.11

What is the major downfall of microprocessor/DSP systems?

  • Speed—they are too fast
  • Speed—they are too slow
  • Too much flexibility
  • Not enough flexibility
Q.12

Most look-up tables in field-programmable gate arrays (FGPAs) use ________ inputs, resulting in ________ possible outputs.

  • 4,16
  • 8,16
  • 4,12
  • 6,12
Q.13

Which is not a type of PLD?

  • SPLD
  • HPLD
  • CPLD
  • FPGA
Q.14

What is the status of a tristate output buffer on a MAX7000S family device?

  • It is permanently enabled or disabled.
  • It is controlled by one of the two global output enable pins.
  • It is controlled by other inputs or functions generated by other macrocells.
  • All of the above
Q.15

A PAL16L8 has:

  • 10 inputs and 8 outputs.
  • 8 inputs and 8 outputs.
  • 16 inputs and 16 outputs.
  • 16 inputs and 8 outputs.
Q.16

What is an OTP device?

  • Optical transporting port
  • Octal transmitting pixel
  • Operational topical portable
  • One-time programmable
Q.17

Which is a major digital system category?

  • Standard logic devices
  • ASICs
  • Microprocessor/DSP devices
  • All of the above
Q.18

The complex programmable logic device (CPLD) features a(n) ________ type of memory.

  • volatile
  • nonvolatile
  • EPROM
  • volitile EPROM
Q.19

A circuit that implements a combinational logic function by storing a list of output values that correspond to all possible input combinations is a(n) ________.

  • output logic macrocell
  • look-up table
  • parallel logic expander
  • logic element
Q.20

In an OLMC, where does the FMUX signal go?

  • OMUX
  • D flip-flop
  • Matrix
  • PAL
Q.21

ASIC stands for:

  • advanced speed integrated circuit.
  • advanced standard integrated circuit.
  • application specific integrated circuit.
  • application speedy integrated circuit.
Q.22

What is the defining difference between microprocessor/DSP systems and other digital systems?

  • The digital system follows a programmed sequence of instructions that the designer specified.
  • The microprocessor follows a programmed sequence of instructions that the designer specified.
  • The digital system is faster.
  • The microprocessor/DSP is faster.
Q.23

An SPLD listed as 16H8 would have ________.

  • active-HIGH outputs
  • active-LOW outputs
  • variable-level outputs
  • latches at the outputs
Q.24

GAL is an acronym for ________.

  • Generic Array Logic
  • General Array Logic
  • Giant Array Logic
  • Generic Analysis Logic
Q.25

Now many times can a GAL be erased and reprogrammed?

  • 0
  • At least 100
  • At least 1000
  • Over 10,000
Q.26

How many product terms can a MAX+Plus II compiler borrow from adjacent macrocells in the same LAB?

  • 0
  • 5
  • 10
  • 20
Q.27

By adding an OR gate to a simple programmable logic device (SPLD) the foundation for a(n) ________ is made possible.

  • PAL
  • PLA
  • CPLD
  • EEPROM
Q.28

Which of the following testing procedures has one or more external moving parts?

  • Bed-of-nails
  • Flying probe
  • EXTEST
  • Boundary scan
Q.29

How many combinations are handled in an LUT?

  • 4
  • 8
  • 16
  • 32
Q.30

Why have PLDs taken over so much of the market?

  • One PLD does the work of many ICs.
  • The PLDs are cheaper.
  • Less power is required.
  • All of the above
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