SPLD is a program language used by PLD software.

How many pins are in an EDF10K70 package?

An EPM 7128S in a ________ PQFP package has 12 I/O per LAB plus 4 additional input-only pins for a total of 100 pins.

The MAX+PLUS II compiler will automatically program a macrocell to borrow up to ________ product terms from each of the 3 adjacent macrocells in the same LAB.

The distinction between CPLDs and FPGAs is ________.

A method for the automated testing of printed circuit boards is called a(n) ________.

In a GAL16V8, the D flip-flops contained in the OLMCs have ________ and ________.

In a programmable logic device circuit diagram, the inputs to each of the OR gates are designated by ________.

The JTAG signals are named TDI, TDO, TMS, and TCK.

The major structures in the MAX7000S are the ________ and ________.

Four subcategories of ASIC devices are available to create digital systems. These are PLDs, gate arrays, standard cells, and ________.

In the GAL16V8, the ________ selects the signal that is fed back into the input matrix.

The GAL16V8 has eight dedicated input pins.

A CPLD is basically a simplified PLD.

The GAL22V10 has 12 outputs pins and 10 input pins.

The Boolean sum of the four product terms is called the sum-of-products.

A macrocell is ________.

The final step in a design flow in which the logic design is implemented in the target device is called ________.

A complex programmable logic device that consists of multiple SPLD arrays with programmable interconnections is called a ________.

Design costs for standard cell ASICs are ________ those for MPGAs.

________ is a mature technology consisting of numerous subfamilies that have been developed over many years of use.

The flexibility of the GAL16V8 is in its ________.

In a MAX7000S device, when an I/O pin is configured as an input, the associated macrocell can be used for ________.

The SPLD classification includes the ________ PLD devices.

The programming technologies that are used in CPLD devices are all nonvolatile.

The Boolean expression AB + CD is an example of ________.

An application program in the development software package that controls the operation of the software is called a ________.

In the FLEX10K device, the LE can produce two outputs to drive local (LAB) and global (fast track) interconnects on the chip.

The GAL16V8 has 32 input variables.

CPLDs and FPGAs are often referred to as high-capacity programmable logic devices (HCPLDs).