Q.1
Which of the following is Universal Gate?
  • OR gate
  • NAND gate
  • AND gate
  • NOR gate
Q.2
In Boolean algebra, the bar sign (-) indicates ___________.
  • OR operation
  • AND operation
  • NOT operation
  • None of the above
Q.3
Among the logic families, the family which can be used at very high frequency greater thanMHz in a 4 bit synchronous counter is
  • TTLAS
  • CMOS
  • ECL
  • TTLLS
Q.4
The inputs of a NAND gate are connected together. The resulting circuit is ___________.
  • OR gate
  • AND gate
  • NOT gate
  • None of the above
Q.5
A NAND gate is called a universal logic element because
  • It is used by everybody
  • Any logic function can be realized by NAND gates alone
  • All the minization techniques are applicable for optimum NAND gate realization
  • Many digital computers use NAND gates.
Q.6
The only function of NOT gate is to ___________.
  • Stop signal
  • Invert input signal
  • Act as a universal gate
  • None of the above
Q.7
Most of the digital computers do not have floating point hardware because
  • Floating point hardware is costly
  • It is slower than software
  • It is not possible to perform floating point addition by hardware
  • Of no specific reason
Q.8
The full form of CML is
  • complementary mode logic
  • current mode logic
  • collector mode logic
  • collector mixed logic
Q.9
The maximum noise voltage that may appear at the input of a logic gate without changing the logical state of its output is termed as
  • noise margin
  • noise immunity
  • white noise
  • signal to noise ratio
Q.10
Fan-in is defined as
  • the number of outputs connected to gate without any degradation in the voltage levels
  • the number of inputs connected to gate without any degradation in the voltage levels
  • the number of outputs connected to gate with degradation in the voltage levels
  • the number of inputs connected to gate with degradation in the voltage levels
Q.11
Fan-in is defined as
  • the number of outputs connected to gate without any degradation in the voltage levels
  • the number of inputs connected to gate without any degradation in the voltage levels
  • the number of outputs connected to gate with degradation in the voltage levels
  • the number of inputs connected to gate with degradation in the voltage levels
Q.12
Power Dissipation in DIC is expressed in
  • watts or kilowatts
  • milliwatts or nanowatts
  • db
  • mdb
Q.13
Power Dissipation in DIC is expressed in
  • watts or kilowatts
  • milliwatts or nanowatts
  • db
  • mdb
Q.14
Propagation delay times can be divided as
  • t(plh) and t(lph)
  • t(lph) and t(phl)
  • t(plh) and t(phl)
  • t(hpl) and t(lph)
Q.15
Propagation delay is defined as
  • the time taken for the output of a gate to change after the inputs have changed
  • the time taken for the input of a gate to change after the outputs have changed
  • the time taken for the input of a gate to change after the intermediates have changed
  • the time taken for the output of a gate to change after the intermediates have changed
Q.16
CMOS refers to
  • continuous metal oxide semiconductor
  • complementary metal oxide semiconductor
  • centred metal oxide semiconductor
  • concrete metal oxide semiconductor
Q.17
Applications of PLAs are
  • registered pals
  • configurable pals
  • pal programming
  • all of the mentioned
Q.18
In FPGA, vertical and horizontal directions are separated by
  • a line
  • a channel
  • a strobe
  • a flip-flop
Q.19
The full form of VLSI is
  • very long single integration
  • very least scale integration
  • very large scale integration
  • very long scale integration
Q.20
The FPGA refers to
  • first programmable gate array
  • field programmable gate array
  • first program gate array
  • field program gate array
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