Q.1
The timing difference between a slow memory and fast processor can be resolved if
Q.2
Which of the following is not treated as hexadecimal constant by assembler in 8085?
Q.3
IC 7485 cannot be cascadeD.
Q.4
Which memory has read operation, byte erase, byte write and chip erase?
Q.5
For a memory with a 16-bit address space, the addressability is
Q.6
A real number consists of
Q.7
Using DeMorgan’s Theorem we can convert any AND-OR structure into
Q.8
In 8086 the number of bytes which can be addressed directly is about
Q.9
A 37 bit mantissa has an accuracy of
Q.10
DS directive in 8085
Q.11
Which of the following is a valid integer constant?
Q.12
In 8085
Q.13
In 8085 which addressing mode is also called inherent addressing?
Q.14
If the sign bit of mantissa is 0 and the exponent is increased from a positive to a more negative number the result is
Q.15
The operating modes of 8255 A are called
Q.16
In a computer the data transfer between hard disk and CPU is nearly the same as that between diskette and CPU.
Q.17
Which of the following pair of gates can form a latch?
Q.18
Assertion (A): Each memory chip has its own address latch.
Reason (R): ALE signal comes out of microprocessor 8085 and goes to memory chip.
Q.19
Because we wish to allow each ASCII code to occupy one location in memory, most memories are __________ addressable.
Q.20
We say that a set of gates is logically complete if we can build any circuit without using any other kind of gates. Which of the following sets are logically complete
0 h : 0 m : 1 s