Q.1

A ripple counter's speed is limited by the propagation delay of:

  • each flip-flop
  • all flip-flops and gates
  • the flip-flops only with gates
  • only circuit gates
Q.2

The mod-10 counter is also referred to as a ________ counter.

  • decade
  • strobing
  • ring
  • BCD
Q.3

What happens to the parallel output word in an asynchronous binary down counter whenever a clock pulse occurs?

  • The output word decreases by 1.
  • The output word decreases by 2.
  • The output word increases by 1.
  • The output word increases by 2.
Q.4

When the output of a tri-state shift register is disabled, the output level is placed in a:

  • float state
  • LOW state
  • high impedance state
  • float state and a high impedance state
Q.5

To operate correctly, starting a ring counter requires:

  • clearing all the flip-flops
  • presetting one flip-flop and clearing all the others
  • clearing one flip-flop and presetting all the others
  • presetting all the flip-flops
Q.6

What type of register would shift a complete binary number in one bit at a time and shift all the stored bits out one bit at a time?

  • PIPO
  • SISO
  • SIPO
  • PISO
Q.7

Ring and johnson counters are _______.

  • asynchronous counters
  • synchronous counters
  • true binary counters
  • asynchronous and true binary counters
Q.8

When two counters are cascaded, the overall mod number is equal to the __________ of their individual mod numbers.

  • product
  • sum
  • log
  • reciprocal
Q.9

Mod-6 and mod-12 counters are most commonly used in:

  • frequency counters
  • multiplexed displays
  • digital clocks
  • power consumption meters
Q.10

A comparison between ring and johnson counters indicates that:

  • a ring counter has fewer flip-flops but requires more decoding circuitry
  • a ring counter has an inverted feedback path
  • a johnson counter has more flip-flops but less decoding circuitry
  • a johnson counter has an inverted feedback path
Q.11

Synchronous counters eliminate the delay problems encountered with asynchronous (ripple) counters because the:

  • input clock pulses are applied only to the first and last stages
  • input clock pulses are applied only to the last stage
  • input clock pulses are not used to activate any of the counter stages
  • input clock pulses are applied simultaneously to each stage
Q.12

A sequence of equally spaced timing pulses may be easily generated by which type of counter circuit?

  • shift register sequencer
  • clock
  • johnson
  • binary
Q.13

One of the major drawbacks to the use of asynchronous counters is that:

  • low-frequency applications are limited because of internal propagation delays
  • high-frequency applications are limited because of internal propagation delays
  • Asynchronous counters do not have major drawbacks and are suitable for use in high- and low-frequency counting applications.
  • Asynchronous counters do not have propagation delays, which limits their use in high-frequency applications.
Q.14

What is meant by parallel-loading the register?

  • Shifting the data in all flip-flops simultaneously
  • Loading data in two of the flip-flops
  • Loading data in all four flip-flops at the same time
  • Momentarily disabling the synchronous SET and RESET inputs
0 h : 0 m : 1 s