Q.1
The timer generates an interrupt, if the count value reaches to
  • a) 00FFH
  • b) FF00H
  • c) 0FFFH
  • d) FFFFH
Q.2
The external interrupt that has the lowest priority among the following is
  • a) TF0
  • b) TF1
  • c) IE1
  • d) NONE
Q.3
Among the five interrupts generated bythe lowest priority is given to the interrupt
  • a) IE0
  • b) TF1
  • c) TF0
  • d) RI
Q.4
Among the five interrupts generated bythe highest priority is given to the interrupt
  • a) IE0
  • b) TF1
  • c) TF0
  • d) IE1
Q.5
All the interrupts are enabled using a special function register called
  • a) interrupt priority register
  • b) interrupt register
  • c) interrupt function register
  • d) interrupt enable register
Q.6
The number of bytes stored on the stack during one operation of PUSH or POP is
  • a) 1
  • b) 2
  • c) 3
  • d) 4
Q.7
The step involved in PUSH operation is
  • a) increment stack by 2 and store 8-bit content to address pointed to by SP
  • b) decrement stack by 1 and store 16-bit content to address pointed to by SP
  • c) increment stack by 1 and store 8-bit content to address pointed to by SP
  • d) store 8-bit content to address pointed to by SP and then increment stack by 1
Q.8
The step involved in POP operation is
  • a) decrement stack by 2 and store 8-bit content to address pointed to by SP
  • b) store 16-bit content to address pointed to by SP and decrement stack by 1
  • c) decrement stack by 1 and store content of top of stack to address pointed to by SP
  • d) store content of top of stack to address pointed to by SP and then decrement stack by 1
Q.9
Thestack is
  • a) auto-decrement during PUSH operations
  • b) auto-increment during POP operations
  • c) auto-decrement during POP operations
  • d) auto-increment during PUSH operations
Q.10
After reset, the stack pointer(SP) is initialized to the address of
  • a) internal ROM
  • b) internal RAM
  • c) external ROM
  • d) external RAM
0 h : 0 m : 1 s