The units that are primarily used to resolve indirect mode of memory addressing is called
  • a) ALU
  • b) AGU
  • c) ALU and AGU
  • d) NONE
The AGUs work at a speed of
  • a) equal to that of processor
  • b) twice the processor
  • c) thrice the processor
  • d) none
Pentium 4 consists of
  • a) 4 ALUs
  • b) 4 AGUs
  • c) 2 ALUs and 2 AGUs
  • d) 4 ALUs and 4 AGUs
The number of instructions that can be executed per clock cycle by the ALU or AGU is
  • a) 1
  • b) 2
  • c) 3
  • d) 4
The paging mechanism of IA-architecture has an extension as
  • a) page memory extension
  • b) page size extension
  • c) page address extension and page size extension
  • d) page memory extension and page size extension
The linear address space is mapped into the processors physical address space either directly or through paging by
  • a) flat memory model
  • b) segmented memory model
  • c) flat or segmented memory model
  • d) none
The features of thread in threading process is
  • a) threads can be bunched together
  • b) threads are simple and light weight
  • c) threads are independent
  • d) all of the mentioned
The process in which multiple threads correspond to the tracking of each individual object is known as
  • a) multiple thread system
  • b) multi thread parallelism
  • c) thread level parallelism
  • d) multi level parallelism
Which of the following is not a type of context switching?
  • a) time-slice multithreading
  • b) on chip multiprocessing
  • c) hyperthreading
  • d) none
The thread level parallelism is a process of
  • a) saving the context of currently executing process
  • b) flushing the CPU of the same process
  • c) loading the context of new next process
  • d) all of the mentioned
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